E801 optimizes the chip cost best by extremely simple instruction set and pipeline and is a product with the lowest cost and power consumption,
which is applicable to the traditional 8-bit MCU application scenarios.
Architecture Features
Instruction set
XuanTie ISA
(32-bit/16-bit variable-length instruction system)
2-stage pipeline
General purpose register
16 32-bit GPR
Bus interface
Single bus
Tightly coupled IP
Interrupt controller, timer
Slide left and right to view the architecture
Please log in Technical Resources for more details >