C807
C807 adopts 8-stage pipeline, dual-issue superscalar architecture and standard MMU (memory management unit) and can run Linux and other operating systems. It also adopts the lightweight out-of-order execution architecture and the speculative execution technology to obtain outstanding performance per watt, and introduces multiple innovative low power technologies in terms of cache access,
short loop processing and so on. It is applicable to security surveillance, audio/video processing and other application areas.
C807 Features Industry Applications
C807
Features
Lightweight out-of-order execution
Lightweight out-of-order execution architecture based on distributed reservation station to improve instruction parallelism
Low-power cache access
High-speed cache access filter to reduce power consumption during operation
Mixed branch processing
Mixed processing technology covering branching direction, function return address, indirect addressing prediction to improve instruction fetch efficiency
Slide left and right to view the architecture
Industry Applications
Network and Communication
Architecture Features
Instruction set
XuanTie ISA
(32-bit/16-bit variable-length instruction system)
Pipeline
8-stage
Microarchitecture
Dual-issue, lightweight out-of-order
General purpose register
32 32-bit GPR
Caches
Optional 16KB-64KB I-Cache
Optional 16KB-64KB D-Cache
Bus interface
Double bus
(system bus peripheral bus)
Floating point engine
Support single-precision/double-precision
floating-point arithmetic
Slide left and right to view the architecture
basic
configurable
Technical Features
Lightweight out-of-order execution
Lightweight out-of-order execution architecture based on distributed reservation station to improve instruction parallelism
Low-power cache access
High-speed cache access filter to reduce power consumption during operation
Mixed branch processing
Mixed processing technology covering branching direction, function return address, indirect addressing prediction to improve instruction fetch efficiency