I805
I805 adopts 4-stage in-order pipeline, AI and DSP-oriented vector compute engine, and low-latency tightly coupled memory (TCM) to provide outstanding data throughout, which is applicable to areas that have a certain requirement on computing power, such as audio encoding and decoding, voice processing, lightweight deep learning network and so on.
I805 Industry Applications
I805
Vector compute engine
Improve computing parallelism, accelerated AI and other application scenarios
Low latency TCM
Expand memory bandwidth, adapt to data-intensive computing scenario
High-performance unaligned memory access
DSP/AI-oriented unaligned memory access acceleration
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Industry Applications
Computer Vision
Smart Home
Intelligent Identification
Architecture Features
Instruction set
XuanTie ISA
(32-bit/16-bit variable-length instruction system)
Pipeline
4-stage in-order pipeline
General purpose register
32 32-bit GPR
16 128-bit VGPR
Caches
Optional 8KB-64KB I-Cache
Optional 8KB-64KB D-Cache
Tightly coupled memory (TCM)
Optional 4KB~1MB I-TCM
Optional 4KB~1MB D-TCM
TCM slave interface
32-bit TCM slave access interface
Bus interface
Double bus
(64-bit system bus 32-bit low latency peripheral bus)
Memory protection
Optional 0~8 protection regions
Scalar compute engine
32-bit Mini SIMD computing unit
Vector compute engine
128-bit vector SIMD computing unit
Tightly coupled IP
Interrupt controller, timer
Floating point engine
Single-precision floating-point unit
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basic
configurable
Technical Features
Vector compute engine
Improve computing parallelism, accelerated AI and other application scenarios
Low latency TCM
Expand memory bandwidth, adapt to data-intensive computing scenario
High-performance unaligned memory access
DSP/AI-oriented unaligned memory access acceleration
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